About

The German Chips Competence Centre (G3C) is a project embedded in the EU Chips Act. It provides free advisory and matchmaking services to companies, institutions, and individuals seeking to implement new developments using chip technologies. Acting as the first national point of contact, the Centre supports users in assessing project feasibility and connects them with suitable development and implementation partners, as well as with compatible European pilot lines. From a technological perspective, G3C focuses on chip design, process development, and integration, with particular emphasis on heterogeneous integration of different technologies. Access to G3C's services is free of charge and open to all interested parties.

The EU Chips Act was adopted with the objective of strengthening the European semiconductor industry over the long term. To achieve this goal, the Act is structured around three pillars. The first pillar focuses on building and reinforcing the European semiconductor ecosystem through targeted investments in research, development (R&D), and infrastructure. Within this pillar, three key activities were defined. A central element here is the establishment of pilot lines to provide the necessary technological infrastructure. In addition, this infrastructure is required to be actively used for R&D purposes. Therefore, to promote the effective transfer of ideas into practical implementation, the European Network of Chips Competence Centres (ENCCC) was created, comprising 30 chip competence centres in 28 countries.

The individual Chips Competence Centres are located across the European Member States and operate within differing strategic priorities and national regulatory frameworks. As a result, it became necessary to establish a common structure and harmonized working methods. Against this background, the aCCCess project was initiated. aCCCess serves as an overarching umbrella for all Chip Competence Centres and defines the common framework within which they operate.

This includes standardized procedures for handling inquiries, as well as for collecting and providing information on the capabilities of the individual pilot lines, and a coordinated, consistent public presence. In addition, aCCCess ensures that cooperation is not limited to bilateral arrangements, but that a pan-European perspective is consistently applied, encompassing all relevant pilot lines.

The European pilot lines represent thematically focused infrastructure investments. Each pilot line addresses a specific technological domain: heterogeneous integration (Germany), power electronics (Italy), photonics (Spain), advanced logic and system-on-chip technologies (Belgium), and FD-SOI–based technologies (France). Given their scope and complexity, establishing multiple pilot line infrastructures in every European Member State is both unnecessary and impractical. Nevertheless, potential users of these pilot lines exist across all European countries, whether they be companies, start-ups, or research and technology organizations (RTOs). To provide these stakeholders with efficient and straightforward access, it is essential to have a competent, locally based point of contact in each EU country. This role is fulfilled by the Chips Competence Centres.

The Competence Centres act as national gateways into the European semiconductor ecosystem. They support innovators in their local languages by assessing needs and directing them to the most appropriate pilot lines or suitable development and implementation partners across Europe. This function does not require a dedicated pilot line in the respective country.

Furthermore, a core requirement of the Competence Centres is their close interconnection with one another. This ensures transparency regarding the competencies and infrastructures available across Europe. As a result, inquiries can be efficiently referred across borders, for example from Germany to Italy, Spain, or other European countries where the relevant technological expertise is available.

There are currently 30 Chips Competence Centres across 28 European countries. Their role is to support innovation-driven stakeholders in moving from initial ideas to implementation. Existing pilot lines and established infrastructure are leveraged whenever this adds value, although their use is not mandatory. The aim is to integrate the existing semiconductor ecosystem in Germany and across Europe in the most effective way possible.

There are currently five European pilot lines: APECS (Germany), FAMES (France), NanoIC (Belgium), PIXEurope (Spain), and WBG (Italy). All of them are organized as consortia and supported by different partnerships of research and development institutions.

However, there is no direct organizational link between G3C and the pilot lines implemented under the EU Chips Act. The role of the Competence Centres is to operate independently of the pilot lines and to direct inquiries to the most suitable partners and infrastructures based on specific needs. This also means that G3C does not favor the German pilot line. Instead, it serves as a neutral point of information and referral for the other European pilot lines and for the European semiconductor ecosystem as a whole.

The German Chips Competence Centre (G3C) works closely with other Chip Competence Centres (CCCs) across Europe to ensure that inquiries are carefully evaluated and that clear, well-founded feasibility assessments can be provided.

Cooperation takes place at several levels. First, representatives of the Competence Centres stay in regular contact through European trade fairs, technical conferences, and industry meetings. These exchanges form the basis for jointly organized workshops that provide deeper insight into the services and capabilities of the respective pilot lines.

Second, regular trilateral and multilateral meetings are held between Competence Centres together with industry partners. These meetings offer hands-on introductions to the technological capabilities of the pilot lines and create a forum to discuss how companies can effectively access and use these infrastructures.

Overall, cooperation among the Competence Centres combines internal networking with direct support for industry. The goal is to streamline access to pilot lines and suitable partners across Europe and to make the European semiconductor ecosystem easier to navigate for companies and innovators.

G3C is organizationally independent of the APECS pilot line. At the same time, it has in-depth knowledge of APECS’s services and structures, as both are implemented by the Research Fab Microelectronics Germany (FMD). This shared institutional background enables short communication paths and rapid access to relevant information about the APECS pilot line.

Despite this close proximity, G3C does not give APECS priority. Instead, it selects the pilot line or development partner that best fits the requirements of each individual request. Where appropriate, G3C can support mediation and facilitate access to APECS, particularly when this represents the most suitable option for addressing the specific need.

The mission of G3C is to translate innovative ideas in the semiconductor field into commercially viable products. To achieve this, G3C connects innovators with technical expertise, relevant know-how, and the appropriate tools needed to support efficient implementation.

A further priority is the early-stage assessment of projects to determine their technical and economic feasibility. This helps ensure that resources are directed toward the most promising initiatives with the potential to contribute to economic growth in Germany and across Europe.

In addition, G3C supports innovative ventures in developing robust and viable business models and contributes to strengthening technological sovereignty within the European semiconductor sector.

G3C provides comprehensive support to companies, start-ups, and research institutions seeking to implement semiconductor innovations, drawing on broad technical and strategic expertise. Its services are structured around three core areas:

• Semiconductor process development: Support for wafer sizes ranging from 6 to 12 inches across a wide range of applications, including biomedical engineering, power electronics, and high-frequency technologies.
• Chip design: Expertise in classical CMOS design, including mixed-signal and high-frequency design, photonics, system-on-chip (SoC) architectures, Field Programmable Gate Array (FPGA) Heterogeneous integration and advanced packaging: Assembly and interconnection technologies that go beyond standardized packaging solutions.

In addition, G3C offers the following services:

·       Free initial consultation to assess the technical and commercial feasibility of innovative ideas.

• Matchmaking with suitable development and implementation partners.
• Facilitated access to pilot line infrastructure or other appropriate technical resources.
• Support in identifying and accessing European funding opportunities, such as the European Chip Design Platform.

Overall, the German Chips Competence Centre (G3C) operates as a comprehensive advisory and matchmaking point, guiding projects from the initial concept through to the finished chip. Throughout this process, technical, commercial, and infrastructure-related aspects are considered in an integrated manner.

G3C’s services are oriented toward all stakeholders pursuing innovative ideas in the field of chip and semiconductor technologies, as well as those considering the use of chip-based solutions. The services are non-binding, free of charge, and fully accessible, and are open to private individuals, start-ups, companies, universities, and research organizations.

Nevertheless, there is a particular interest in supporting start-ups and small and medium-sized enterprises (SMEs).

G3C is implemented by the Research Fab Microelectronics Germany (FMD, for its acronym in German), specifically by the FMD business office.

The FMD is a joint research cooperation in the field of micro and nanoelectronics. The FMD brings together institutes from two German research organizations, the Fraunhofer-Gesellschaft and the Leibniz Association. Around 5400 employees across all cooperating institutes contribute with their expertise to the FMD. Based in Berlin, the FMD business office acts as a point of contact for potential stakeholders and customers in Germany and Europe on all matters concerning micro and nanoelectronics research and development.

With its extensive network across multiple institutes, FMD has a comprehensive overview of the expertise and infrastructure available in Germany and across Europe. This positions FMD ideally to fulfill the role of G3C as a central point of contact, advisory body, and intermediary within the European semiconductor ecosystem.

The operational implementation of G3C is handled by a small, specialized team based at its Berlin office. In addition, G3C draws on a network of experts at the participating institutes, who support its work through research activities, feasibility assessments, and technical advisory services.

Alexander Stanitzki leads G3C as Project Manager. He brings many years of professional experience in chip and circuit design, as well as in process and technology development. His career spans both in-depth technical work in chip design and business development roles within the Fraunhofer-Gesellschaft.

Due to his experience developing chips from initial concept to volume production across diverse application areas, along with his broad overview of competencies and infrastructures across multiple institutes, Stanitzki brings the technical and strategic expertise required to lead and implement G3C.

The project started in October 2025 and is planned for a total duration of four years, running until October 2029.

G3C has a total budget of approximately four million euros over a four-year period. Funding is provided jointly by the European Chips Joint Undertaking (Chips JU) and the German Federal Ministry of Research, Technology, and Space (BMFTR) under a standard 50:50 co-financing arrangement.

A small share of the budget is allocated to the development of training and continuing education activities. The majority is dedicated to G3C’s advisory and matchmaking services, particularly the required personnel resources and participation in, as well as organization of, specialized professional events.

The Chip Competence Centres (CCCs) combine strong local roots with close Europe-wide networking. Each centre is firmly embedded in its national ecosystem while working in close coordination with other centres across Europe. This decentralized structure allows inquiries to be handled efficiently at the local level and, when needed, quickly referred to the most suitable partners or pilot lines elsewhere in Europe.

In addition, the concept of the CCC is closely integrated with existing research and technology infrastructures, pilot lines, and funding instruments such as the European Chip Design Platform. The centres not only facilitate access to infrastructure and technical expertise, but also support the financing and implementation of projects within a European framework.

Another distinguishing feature is that the CCCs’ advisory and referral services are provided free of charge and are fully publicly funded. This allows even unconventional or early-stage ideas to be explored and supported without immediate economic pressure. The combination of local proximity, Europe-wide coordination, and free, publicly funded support makes the concept of the CCC unique on a global scale.

The EU Chips Design Platform (EuroCDP) is one of the three key instruments under the first pillar of the EU Chips Act. It provides access to design tools and funding that support the development of chip designs, which can then be implemented through the European pilot lines.

Competence Centres such as G3C help interested stakeholders stay informed, identify suitable partners, and efficiently access both infrastructure and design platforms. In this setting, EuroCDP, the pilot lines, and the CCCs work closely together to support projects from the initial concept through to implementation.